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Computer Systems Lecture 13 Pipeline Stages CS 230 - Spring 2020 - PowerPoint PPT Presentation

CS 230 Introduction to Computers and Computer Systems Lecture 13 Pipeline Stages CS 230 - Spring 2020 3-1 System Layers Python/C/Racket Code Multiprocessing and Operating Systems Build and Runtime Environments Memory and Caching


  1. CS 230 – Introduction to Computers and Computer Systems Lecture 13 – Pipeline Stages CS 230 - Spring 2020 3-1

  2. System Layers Python/C/Racket Code Multiprocessing and Operating Systems Build and Runtime Environments Memory and Caching Here now! CS 230 Finished! CPU Instructions and Pipelining Binary Signals & Number Representation Finished! Logic Gates Transistors and Electrical Properties CS 230 - Spring 2020 0-2

  3. Clock  Clock cycle : beat of computer  Clock signal voltage tick tick tick time  Electrical signals propagate fast  but not infinitely fast: remember gate delays  Rising edge called a tick  like a drummer for a dragon boat, keeps things in sync CS 230 - Spring 2019 3-3

  4. CPU Clocking  Do work, update state, do work, update state… Clock period Clock (cycles) Data transfer and computation Update state  Split instruction into pipeline stages  One pipeline stage per clock cycle  MIPS has 5 pipeline stages CS 230 - Spring 2019 3-4

  5. MIPS Pipeline Stages  IF : Instruction fetch  retrieve the instruction  ID : Instruction decode  decode the instruction and load the registers we need  EX : Execute  operate the arithmetic logic unit (ALU)  MEM : Memory access  access memory  WB : Write back  write results back to registers CS 230 - Spring 2019 3-5

  6. IF – Instruction Fetch  Look at address in memory stored in PC  Load the 32-bit value from that address  this is the next instruction  pass this value on to ID  Increment PC by 4 CS 230 - Spring 2020 3-6

  7. ID – Instruction Decode  Get 32-bit binary instruction from IF  Decode it  what instruction is it?  what registers does it need?  what immediate values does it need?  if it is a branch:  is the branch condition met? if so, update PC accordingly  CS 230 - Spring 2020 3-7

  8. MIPS Reference Sheet (also posted along with slides) CS 230 - Spring 2020 3-8

  9. Instruction Decode Example 00100000110000110000000000010001  Look at bits of instruction CS 230 - Spring 2020 3-9

  10. Instruction Decode Example 00100000110000110000000000010001 addi  Look at bits of instruction  what instruction is it? CS 230 - Spring 2020 3-10

  11. Instruction Decode Example 00100000110000110000000000010001 addi $3, $6  Look at bits of instruction  what instruction is it?  what registers does it need? CS 230 - Spring 2020 3-11

  12. Instruction Decode Example 00100000110000110000000000010001 addi $3, $6, 17  Look at bits of instruction  what instruction is it?  what registers does it need?  what immediate values does it contain?  two’s complement except .word when using hexadecimal, which is unsigned binary  CS 230 - Spring 2020 3-12

  13. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 00000000101010000011100000101010 10101100111001000000000000010000 CS 230 - Spring 2020 3-13

  14. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 000000 000000000001101 00000010000 mfhi 00000000101010000011100000101010 10101100111001000000000000010000 CS 230 - Spring 2020 3-14

  15. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 0000000000000000 01101 00000010000 mfhi $13 00000000101010000011100000101010 10101100111001000000000000010000 CS 230 - Spring 2020 3-15

  16. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 000000 001010100000111 00000101010 slt 10101100111001000000000000010000 CS 230 - Spring 2020 3-16

  17. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 0000000010101000 00111 00000101010 slt $7 10101100111001000000000000010000 CS 230 - Spring 2020 3-17

  18. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 000000 00101 010000011100000101010 slt $7, $5 10101100111001000000000000010000 CS 230 - Spring 2020 3-18

  19. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 00000000101 01000 0011100000101010 slt $7, $5, $8 10101100111001000000000000010000 CS 230 - Spring 2020 3-19

  20. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 00000000101010000011100000101010 slt $7, $5, $8 101011 00111001000000000000010000 sw CS 230 - Spring 2020 3-20

  21. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 00000000101010000011100000101010 slt $7, $5, $8 10101100111 00100 0000000000010000 sw $4 CS 230 - Spring 2020 3-21

  22. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 00000000101010000011100000101010 slt $7, $5, $8 101011 00111 001000000000000010000 sw $4, ( $7 ) CS 230 - Spring 2020 3-22

  23. Try it Yourself What MIPS instructions are encoded as the following 32-bit binary numbers? 00000000000000000110100000010000 mfhi $13 00000000101010000011100000101010 slt $7, $5, $8 1010110011100100 0000000000010000 sw $4, 16 ($7) CS 230 - Spring 2020 3-23

  24. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 beq $1, $0, 3 CS 230 - Spring 2020 3-24

  25. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 000000 00000100000 beq $1, $0, 3 CS 230 - Spring 2020 3-25

  26. Try it Yourself What are the binary representations of the following MIPS instructions? add $2 , $3, $1 000000 00010 00000100000 beq $1, $0, 3 CS 230 - Spring 2020 3-26

  27. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3 , $1 000000 00011 0001000000100000 beq $1, $0, 3 CS 230 - Spring 2020 3-27

  28. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 00000000011 00001 0001000000100000 beq $1, $0, 3 CS 230 - Spring 2020 3-28

  29. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 00000000011000010001000000100000 beq $1, $0, 3 000100 CS 230 - Spring 2020 3-29

  30. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 00000000011000010001000000100000 beq $1 , $0, 3 000100 00001 CS 230 - Spring 2020 3-30

  31. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 00000000011000010001000000100000 beq $1, $0 , 3 00010000001 00000 CS 230 - Spring 2020 3-31

  32. Try it Yourself What are the binary representations of the following MIPS instructions? add $2, $3, $1 00000000011000010001000000100000 beq $1, $0, 3 0001000000100000 0000000000000011 CS 230 - Spring 2020 3-32

  33. EX – Execute  Get from ID the:  32-bit input register contents  instruction to do  for lw and sw this is an addition of the offset  destination register  Use the ALU to do the math for the instruction  Pass on to MEM the:  32-bit result of the math  destination register and instruction CS 230 - Spring 2020 3-33

  34. MEM – Memory Access  Get from EX the:  32-bit result of the math  destination register and instruction  If instruction is lw or sw  load from or store to memory  otherwise do nothing (just pass on values)  Pass on to WB the:  32-bit result, or value loaded from memory (for lw)  destination register and instruction CS 230 - Spring 2020 3-34

  35. WB – Write Back  Get from MEM the:  32-bit result of the math or loaded value  destination register and instruction  If instruction is not sw  put result or loaded value into destination register CS 230 - Spring 2020 3-35

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