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Array Attributes
- ‘RANGE returns range of vector signals
- ‘LENGTH returns length of vector signals
Chapter 6 Design Organization and Parameterization Part 2 1 - - PowerPoint PPT Presentation
Chapter 6 Design Organization and Parameterization Part 2 1 - - PowerPoint PPT Presentation
Chapter 6 Design Organization and Parameterization Part 2 1 benyamin@mehr.sharif.edu Array Attributes RANGE returns range of vector signals LENGTH returns length of vector signals signal A:BIT_VECTOR(7 downto 0) Arange =
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int2bin Procedure
PROCEDURE int2bin (int: IN INTEGER;bin:OUT BIT_VECTOR) IS VARIABLE tmp : INTEGER; BEGIN tmp:=int; FOR I IN 0 TO (bin’LENGTH-1) LOOP IF (tmp MOD 2 = 1) THEN bin(i):=‘1’; ELSE bin(i):=‘0’; END IF; tmp:=tmp/2; END LOOP; END int2bin;
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to_integer Function
FUNCTION to_integer (bin: BIT_VECTOR) RETURN INTEGER IS VARIABLE result : INTEGER; BEGIN result:=0; FOR I IN bin’RANGE LOOP IF (bin(i)=‘1’) THEN result=result+2**i; END IF; END LOOP; RETURN result; END to_integer;
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apply_data Redesign
PROCEDURE apply_data ( SIGNAL target: OUT BIT_VECTOR(3 DOWNTO 0); CONSTANT values:IN integers; CONSTANT period:IN TIME) IS VARIABLE buf:BIT_VECTOR(3 DOWNTO 0); BEGIN FOR I in 0 TO 12 LOOP int2bin(values(i),buf); target<=TRANSPORT buf AFTER i*period; END LOOP; END Apply_data;
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Packaging Parts and Utilities
- Packages construct in VHDL is used for
– Grouping components – Packaging commonly used user-defined types – Packaging commonly used subprograms
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Package Syntax
PACKAGE package_name IS [component declaration] [constant declaration] [type and subtype declaration] [subprogram declaration] END package_name;
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Packaging Components
PACKAGE simple_gates IS
COMPONENT n1 PORT (i1: IN BIT; o1: OUT BIT); END COMPONENT COMPONENT n2 PORT (i1,i2: IN BIT; o1: OUT BIT); END COMPONENT COMPONENT n3 PORT (i1,i2,i3: IN BIT; o1: OUT BIT); END COMPONENT
END simple_gates;
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Packaging Components
USE WORK.simple_gates.ALL; ARCHITECTURE gate_level OF bit_comparator IS FOR ALL:n1 USE ENTITY WORK.inv(single_delay); FOR ALL:n2 USE ENTITY WORK.nand2(single_delay); FOR ALL:n3 USE ENTITY WORK.nand3(single_delay); SIGNAL … BEGIN g0: n1 PORT MAP(…); g1: n2 PORT MAP(…); g2: n3 PORT MAP(…); … END;
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Packaging Components
USE WORK.simple_gates.ALL; USE WORK.simple_gates.n1, WORK.simple_gates.n2, WORK.simple_gates.n3;
n1 becomes visible Entire package is visible
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Packaging Subprograms
- Function and Procedure declarations part
must be defined in PACKAGE.
- Function and Procedure Bodies must be
defined in PACKAGE BODY.
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Package Body Syntax
PACKAGE BODY pack_name IS BEGIN procedure and function bodies. END pack_name;
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basic_utilities Package
PACKAGE basic_utilities IS TYPE integers IS ARRAY (0 TO 12) OF INTEGERS; CONSTANT gnd:BIT:=‘0’; CONSTANT vdd:BIT:=‘1’; FUNCTION to_integer (bin: BIT_VECTOR) RETURN INTEGER; PROCEDURE int2bin (int: IN INTEGER;bin:OUT BIT_VECTOR); PROCEDURE bin2bin (bin:IN BIT_VECTOR;int: OUT INTEGER); PROCEDURE apply_data ( SIGNAL target: OUT BIT_VECTOR(3 DOWNTO 0); CONSTANT values:IN integers; CONSTANT period:IN TIME ); END basic_utilities;
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basic_utilities Package Body - 1
PACKAGE BODY basic_utilities IS FUNCTION int2bin (bin: BIT_VECTOR) RETURN INTEGER IS VARIABLE result : INTEGER; BEGIN result:=0; FOR I IN bin’RANGE LOOP IF (bin(i)=‘1’) THEN result=result+2**i; END IF; END LOOP; RETURN result; END int2bin;
- -next page
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basic_utilities Package Body - 2
- -from previous page
PROCEDURE int2bin (int: IN INTEGER;bin:OUT BIT_VECTOR) IS VARIABLE tmp : INTEGER; BEGIN tmp:=int; FOR I IN 0 TO (bin’LENGTH-1) LOOP IF (tmp MOD 2 = 1) THEN bin(i):=‘1’; ELSE bin(i):=‘0’; END IF; tmp:=tmp/2; END LOOP; END int2bin;
- -nex page
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basic_utilities Package Body - 3
- -from previous page
PROCEDURE bin2int(bin:IN BIT_VECTOR;int:OUT INTEGER) IS VARIABLE result:INTEGER; BEGIN result:=0; FOR i IN bin’RANGE LOOP IF bin(i)=‘1’ THEN result:=result+2**I; END IF; END FOR; END bin2int;
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basic_utilities Package Body - 4
- -from previous page
PROCEDURE apply_data ( SIGNAL target: OUT BIT_VECTOR(3 DOWNTO 0); CONSTANT values:IN integers; CONSTANT period:IN TIME) IS VARIABLE buf:BIT_VECTOR(3 DOWNTO 0); BEGIN FOR I in 0 TO 12 LOOP int2bin(values(i),buf); target<=TRANSPORT buf AFTER i*period; END LOOP; END Apply_data; END basic_utilities;
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