bounding data races in space and time
play

Bounding Data Races in Space and Time KC Sivaramakrishnan - PowerPoint PPT Presentation

Feb 27, 2024 •191 likes •1.2k views

Bounding Data Races in Space and Time KC Sivaramakrishnan University of Darwin College, 1851 Royal OCaml Labs Cambridge Cambridge Commission 1 Multicore OCaml 2 Multicore OCaml OCaml is an industrial-strength, functional

  1. Bounding Data Races in Space and Time KC Sivaramakrishnan University of Darwin College, 1851 Royal OCaml Labs Cambridge Cambridge Commission � 1

  2. Multicore OCaml � 2

  3. Multicore OCaml • OCaml is an industrial-strength, functional programming language ★ Projects: MirageOS unikernel, Coq proof assistant, F* programming language ★ Companies: Facebook (Hack, Flow, Infer, Reason), Microsoft (Everest, F*), JaneStreet (all trading & support systems), Docker (Docker for Mac & Windows), Citrix (XenStore) � 2

  4. Multicore OCaml • OCaml is an industrial-strength, functional programming language ★ Projects: MirageOS unikernel, Coq proof assistant, F* programming language ★ Companies: Facebook (Hack, Flow, Infer, Reason), Microsoft (Everest, F*), JaneStreet (all trading & support systems), Docker (Docker for Mac & Windows), Citrix (XenStore) • No multicore support! � 2

  5. Multicore OCaml • OCaml is an industrial-strength, functional programming language ★ Projects: MirageOS unikernel, Coq proof assistant, F* programming language ★ Companies: Facebook (Hack, Flow, Infer, Reason), Microsoft (Everest, F*), JaneStreet (all trading & support systems), Docker (Docker for Mac & Windows), Citrix (XenStore) • No multicore support! • Multicore OCaml ★ Native support for concurrency and parallelism in OCaml ★ Lead from OCaml Labs + (JaneStreet, Microsoft Research, INRIA). � 2

  6. Modelling Memory � 3

  7. Modelling Memory • How do you reason about access to memory? � 3

  8. Modelling Memory • How do you reason about access to memory? ★ Spoiler: No single global sequentially consistent memory � 3

  9. Modelling Memory • How do you reason about access to memory? ★ Spoiler: No single global sequentially consistent memory • Modern multicore processors reorder instructions for performance � 3

  10. Modelling Memory • How do you reason about access to memory? ★ Spoiler: No single global sequentially consistent memory • Modern multicore processors reorder instructions for performance Initially a = 0 && b =0 Thread 1 Thread 2 a = 1 b = 1 r1 = b r2 = a r1 == 0 && r2 ==0 ??? � 3

  11. Modelling Memory • How do you reason about access to memory? ★ Spoiler: No single global sequentially consistent memory • Modern multicore processors reorder instructions for performance Initially a = 0 && b =0 Thread 1 Thread 2 a = 1 b = 1 r1 = b r2 = a r1 == 0 && r2 ==0 ??? Allowed under x86, ARM, POWER � 3

  12. Modelling Memory • How do you reason about access to memory? ★ Spoiler: No single global sequentially consistent memory • Modern multicore processors reorder instructions for performance Initially a = 0 && b =0 Thread 1 Thread 2 a = 1 b = 1 r1 = b r2 = a Write buffering r1 == 0 && r2 ==0 ??? Allowed under x86, ARM, POWER � 3

  13. Modelling Memory • How do you reason about access to memory? ★ Spoiler: No single global sequentially consistent memory • Modern multicore processors reorder instructions for performance Initially a = 0 && b =0 Thread 1 Thread 2 r1 = b r2 = a a = 1 b = 1 Write buffering r1 == 0 && r2 ==0 ??? Allowed under x86, ARM, POWER � 4

  14. Modelling Memory • Compilers optimisations also reorder memory access instructions � 5

  15. Modelling Memory • Compilers optimisations also reorder memory access instructions Thread 1 Thread 1 r1 = a * 2 r1 = a * 2 CSE − − → r2 = b + 1 r2 = b + 1 r3 = a * 2 r3 = r1 � 5

  16. Modelling Memory • Compilers optimisations also reorder memory access instructions Thread 1 Thread 1 r1 = a * 2 r1 = a * 2 CSE − − → r2 = b + 1 r2 = b + 1 r3 = a * 2 r3 = r1 Initially &a == &b && a = b = 1 � 5

  17. Modelling Memory • Compilers optimisations also reorder memory access instructions Thread 1 Thread 1 r1 = a * 2 r1 = a * 2 CSE − − → r2 = b + 1 r2 = b + 1 r3 = a * 2 r3 = r1 Initially &a == &b Thread 2 && b = 0 a = b = 1 � 5

  18. Modelling Memory • Compilers optimisations also reorder memory access instructions Thread 1 Thread 1 r1 = a * 2 r1 = a * 2 CSE − − → r2 = b + 1 r2 = b + 1 r3 = a * 2 r3 = r1 Initially &a == &b Thread 2 && b = 0 a = b = 1 r1 == 2 && r2 == 0 && r3 == 0 � 5

  19. Modelling Memory • Compilers optimisations also reorder memory access instructions Thread 1 Thread 1 r1 = a * 2 r1 = a * 2 CSE − − → r2 = b + 1 r2 = b + 1 r3 = a * 2 r3 = r1 Initially &a == &b Thread 2 && b = 0 a = b = 1 r1 == 2 && r1 == 2 && r2 == 0 && r2 == 0 && r3 == 0 r3 == 2 � 5

  20. Modelling Memory • Compilers optimisations also reorder memory access instructions Thread 1 Thread 1 r1 = a * 2 r1 = a * 2 CSE − − → r3 = a * 2 r2 = b + 1 r2 = b + 1 r3 = r1 Initially &a == &b Thread 2 && b = 0 a = b = 1 r1 == 2 && r1 == 2 && r2 == 0 && r2 == 0 && r3 == 0 r3 == 2 � 6

  21. Memory Model • Unambiguous specification of program outcomes ★ More than just thread interleavings Memory model OCaml compiler � 7

  22. Memory Model • Unambiguous specification of program outcomes ★ More than just thread interleavings • Memory Model Desiderata ★ Not too weak (good for programmers) ★ Not too strong (good for hardware) Memory model ★ Admits optimisations (good for compilers) ★ Mathematically rigorous (good for verification) OCaml compiler � 7

  23. Memory Model • Unambiguous specification of program outcomes ★ More than just thread interleavings • Memory Model Desiderata ★ Not too weak (good for programmers) ★ Not too strong (good for hardware) Memory model ★ Admits optimisations (good for compilers) ★ Mathematically rigorous (good for verification) • Difficult to get right OCaml compiler ★ C/C++11 memory model is flawed ★ Java memory model is flawed ★ Several papers every year in top PL conferences proposing / fixing models � 7

  24. Memory Model: Programmer’s view � 8

  25. Memory Model: Programmer’s view • Data race ★ Concurrent access to memory location, one of which is a write � 8

  26. Memory Model: Programmer’s view • Data race ★ Concurrent access to memory location, one of which is a write • Sequential consistency (SC) ★ No intra-thread reordering , only inter-thread interleaving � 8

  27. Memory Model: Programmer’s view • Data race ★ Concurrent access to memory location, one of which is a write • Sequential consistency (SC) ★ No intra-thread reordering , only inter-thread interleaving • DRF-SC : primary tool in concurrent programmers arsenal ★ If a program has no races (under SC semantics), then the program has SC semantics ★ Well-synchronised programs do not have surprising behaviours � 8

  28. Memory Model: Programmer’s view • Data race ★ Concurrent access to memory location, one of which is a write • Sequential consistency (SC) ★ No intra-thread reordering , only inter-thread interleaving • DRF-SC : primary tool in concurrent programmers arsenal ★ If a program has no races (under SC semantics), then the program has SC semantics ★ Well-synchronised programs do not have surprising behaviours • Our observation: DRF-SC is too weak for programmers � 8

  29. C/C++ Memory Model • C/C++ (C11) memory model offers DRF-SC, but.. � 9

  30. C/C++ Memory Model • C/C++ (C11) memory model offers DRF-SC, but.. ★ If a program has races (even benign), then the behaviour is undefined! � 9

  31. C/C++ Memory Model • C/C++ (C11) memory model offers DRF-SC, but.. ★ If a program has races (even benign), then the behaviour is undefined! ★ Most C/C++ programs have races => most C/C++ programs are allowed to crash and burn � 9

  32. C/C++ Memory Model • C/C++ (C11) memory model offers DRF-SC, but.. ★ If a program has races (even benign), then the behaviour is undefined! ★ Most C/C++ programs have races => most C/C++ programs are allowed to crash and burn • Races on unrelated locations can affect behaviour � 9

  33. C/C++ Memory Model • C/C++ (C11) memory model offers DRF-SC, but.. ★ If a program has races (even benign), then the behaviour is undefined! ★ Most C/C++ programs have races => most C/C++ programs are allowed to crash and burn • Races on unrelated locations can affect behaviour ★ We would like a memory model where data races are bounded in space � 9

  34. Java Memory Model • Java also offers DRF-SC ★ Unlike C++, type safety necessitates defined behaviour under races � 10

  35. Java Memory Model • Java also offers DRF-SC ★ Unlike C++, type safety necessitates defined behaviour under races ★ No data races in space , but allows races in time … � 10

  36. Java Memory Model • Java also offers DRF-SC ★ Unlike C++, type safety necessitates defined behaviour under races ★ No data races in space , but allows races in time … int a; volatile bool flag; � 10

  37. Java Memory Model • Java also offers DRF-SC ★ Unlike C++, type safety necessitates defined behaviour under races ★ No data races in space , but allows races in time … int a; volatile bool flag; Thread 1 a = 1; flag = true; � 10

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend

Protecting Applications Against TOCTTOU Races by User-Space Caching of File Metadata Mathias

Protecting Applications Against TOCTTOU Races by User-Space Caching of File Metadata Mathias

DynaRace Protecting Applications Against TOCTTOU Races by User-Space Caching of File Metadata Mathias Payer & Thomas R. Gross Department of Computer Science ETH Zrich, Switzerland TOCTTOU races Time Of Check To Time of Use (TOCTTOU)

828 views • 33 slides
Data Races are Bad Race: two threads access memory without synchronization and at least one is a

Data Races are Bad Race: two threads access memory without synchronization and at least one is a

C ONTEXT - SENSITIVE C ORRELATION A NALYSIS FOR D ETECTING R ACES Polyvios Pratikakis Jeff Foster Michael Hicks University of Maryland, College Park Context-sensitive Correlation Analysis for Detecting Races p.1/ ?? Data Races are Bad

1.28k views • 76 slides
Spatial Data Structures Hierarchical Bounding Volumes Hierarchical Bounding Volumes Grids Grids

Spatial Data Structures Hierarchical Bounding Volumes Hierarchical Bounding Volumes Grids Grids

Spatial Data Structures Hierarchical Bounding Volumes Hierarchical Bounding Volumes Grids Grids Octrees Octrees BSP Trees BSP Trees 11/7/02 Thursday, April 1, 2010 Speeding Up Computations Ray Tracing Spend a lot of time doing

882 views • 55 slides
Learning From Data Lecture 6 Bounding The Growth Function Bounding the Growth Function Models

Learning From Data Lecture 6 Bounding The Growth Function Bounding the Growth Function Models

Learning From Data Lecture 6 Bounding The Growth Function Bounding the Growth Function Models are either Good or Bad The VC Bound - replacing |H| with m H ( N ) M. Magdon-Ismail CSCI 4100/6100 recap: The Growth Function m H ( N ) A new

316 views • 31 slides
2012-08-07 CSE 332 Data Abstractions: Data Races and Memory, Reordering, Deadlock,

2012-08-07 CSE 332 Data Abstractions: Data Races and Memory, Reordering, Deadlock,

2012-08-07 CSE 332 Data Abstractions: Data Races and Memory, Reordering, Deadlock, Readers/Writer Locks, and Condition Variables (oh my!) *ominous music* THE FINAL EXAM Kate Deibel Summer 2012 August 6, 2012 CSE 332 Data Abstractions,

339 views • 14 slides
Data-Race Detection for Interrupt-Driven Data-Races and Happens- Kernels Before Analyzing

Data-Race Detection for Interrupt-Driven Data-Races and Happens- Kernels Before Analyzing

Overview Problem Definition Interrupt- Driven Programs Data-Race Detection for Interrupt-Driven Data-Races and Happens- Kernels Before Analyzing FreeRTOS Kernel Library Nikita Chopra, Deepak DSouza and Rekha Pai Conclusion Indian

512 views • 21 slides
Beetle Races! Measuring Distance and Time and Calculating Rate in a Living, Moving Insect

Beetle Races! Measuring Distance and Time and Calculating Rate in a Living, Moving Insect

Experiment Number Here Beetle Races! Measuring Distance and Time and Calculating Rate in a Living, Moving Insect Objective Students will measure distance and time as they race mealworm beetles, Tenebrio molitor , for 45 seconds. Students will

467 views • 7 slides
CoRD: Collabora,ve Data Race Detec,on Baris Kasikci, Cris,an

CoRD: Collabora,ve Data Race Detec,on Baris Kasikci, Cris,an

CoRD: Collabora,ve Data Race Detec,on Baris Kasikci, Cris,an Zamfir, and George Candea School of Computer & Communica3on Sciences Data Races 2 Data Races

858 views • 70 slides
Improving Spatial Data Processing by Clipping Minimum Bounding Boxes Darius Sidlauskas Sean

Improving Spatial Data Processing by Clipping Minimum Bounding Boxes Darius Sidlauskas Sean

Improving Spatial Data Processing by Clipping Minimum Bounding Boxes Darius Sidlauskas Sean Chester EPFL NTNU Eleni Tzirita Zacharatou Anastasia Ailamaki EPFL EPFL Br Brain mo model el (axons) 97% of the Minimum Bounding Box is empty

447 views • 29 slides
Markov Chains and Coupling In this class we will consider the problem of bounding the time taken

Markov Chains and Coupling In this class we will consider the problem of bounding the time taken

Markov Chains and Coupling In this class we will consider the problem of bounding the time taken by a Markov chain to reach the stationary distribution. We will do so using the coupling technique , which helps bound the distance between two

315 views • 4 slides
S Space-in-Time and Time-in-Space Self-Organizing Maps i Ti d Ti i S S lf O i i M for

S Space-in-Time and Time-in-Space Self-Organizing Maps i Ti d Ti i S S lf O i i M for

S Space-in-Time and Time-in-Space Self-Organizing Maps i Ti d Ti i S S lf O i i M for Exploring Spatiotemporal Patterns Gennady Andrienko & Natalia Andrienko http://geoanalytics.net htt // l ti t Sebastian Bremm, Tobias Schreck,

632 views • 29 slides
Week 5 Space-Time Tradeoffs and Calgary Drop-In Centre Locating a Particular Piece of Data

Week 5 Space-Time Tradeoffs and Calgary Drop-In Centre Locating a Particular Piece of Data

Week 5 Space-Time Tradeoffs and Calgary Drop-In Centre Locating a Particular Piece of Data 2 Growth-rate Functions O(1) constant time, the time is independent of n , e.g. array look-up O(log n ) logarithmic time, usually the log

549 views • 6 slides
Looking Inside a Race Detector kavya @kavya719 data race detection data races when two+

Looking Inside a Race Detector kavya @kavya719 data race detection data races when two+

Looking Inside a Race Detector kavya @kavya719 data race detection data races when two+ threads concurrently access a shared memory location, at least one access is a write. data race // Shared variable R R R var count = 0 W R

691 views • 57 slides
Fusing space-time data under measurement error for computer model output Veronica J. Berrocal (

Fusing space-time data under measurement error for computer model output Veronica J. Berrocal (

Fusing space-time data under measurement error for computer model output Veronica J. Berrocal ( vjb2@stat.duke.edu ) SAMSI joint work with Alan E. Gelfand and David M. Holland Veronica J. Berrocal Fusing space-time data under measurement error

577 views • 46 slides
IN INTERNATION IONAL MIX MIXED T TEAM R M RELAY Race format 2 rounds of 4 races 2 teams per

IN INTERNATION IONAL MIX MIXED T TEAM R M RELAY Race format 2 rounds of 4 races 2 teams per

IN INTERNATION IONAL MIX MIXED T TEAM R M RELAY Race format 2 rounds of 4 races 2 teams per race Race distance = 9 x 250m Winner = fastest accumulated time for the two races Teams 8 Teams 9 crews per team 3 JM1x, 3 JW1x, 1 or 2

379 views • 12 slides
Dynamically Detecting and Tolerating IF-Condition Data Races Shanxiang Qi (Google), Abdullah

Dynamically Detecting and Tolerating IF-Condition Data Races Shanxiang Qi (Google), Abdullah

Dynamically Detecting and Tolerating IF-Condition Data Races Shanxiang Qi (Google), Abdullah Muzahid (University of San Antonio), Wonsun Ahn , Josep Torrellas University of Illinois at Urbana-Champaign HPCA-2014, Feb 2014 Background: Data

266 views • 22 slides
Absorber Introduction & Overview Jim Hylen LBNE Hadron Absorber Core Advanced Conceptual

Absorber Introduction & Overview Jim Hylen LBNE Hadron Absorber Core Advanced Conceptual

Absorber Introduction & Overview Jim Hylen LBNE Hadron Absorber Core Advanced Conceptual Design Review 20 January 2015 Outline Summary of Requirements Brief description of absorber design Details of radiation & energy

1.99k views • 51 slides
SECURITY IN THE AGE OF FRAMEWORKS LUKA KLADARIC // L@K.HR // @KLL 1 FSec 2016 2 FSec

SECURITY IN THE AGE OF FRAMEWORKS LUKA KLADARIC // L@K.HR // @KLL 1 FSec 2016 2 FSec

SECURITY IN THE AGE OF FRAMEWORKS LUKA KLADARIC // L@K.HR // @KLL 1 FSec 2016 2 FSec 2016 ONCE UPON A TIME... 3 FSec 2016 WE WROTE OUR OWN CODE 4 FSec 2016 ALL OF IT. 5 FSec 2016 so we knew what was in it. we knew every

788 views • 68 slides
Connectivity Corollary. GRAPH CONNECTIVITY is not FO definable Connectivity Corollary. GRAPH

Connectivity Corollary. GRAPH CONNECTIVITY is not FO definable Connectivity Corollary. GRAPH

Connectivity Corollary. GRAPH CONNECTIVITY is not FO definable Connectivity Corollary. GRAPH CONNECTIVITY is not FO definable If A is a linear order of size n, let G( A ) be the graph with edges { i, i+2 mod n } for all a A Connectivity

905 views • 55 slides
Infinite and Finite Model Theory Part II Anuj Dawar Computer Laboratory University of Cambridge

Infinite and Finite Model Theory Part II Anuj Dawar Computer Laboratory University of Cambridge

Infinite and Finite Model Theory Part II Anuj Dawar Computer Laboratory University of Cambridge Lent 2002 3/2002 0 Finite Model Theory Finite Model Theory motivated by computational issues; relationship between language and

693 views • 67 slides
Exploiting Microarchitectural Flaws in the Heart of the Memory Subsystem Daniel Moghimi,

Exploiting Microarchitectural Flaws in the Heart of the Memory Subsystem Daniel Moghimi,

Exploiting Microarchitectural Flaws in the Heart of the Memory Subsystem Daniel Moghimi, Worcester Polytechnic University Feb 20, 2020 Columbia University Spoiler!! 2 CPU Memory Subsystem Allocation Queue Front End CPU Memory Subsystem

1.59k views • 127 slides
172 Plan 1. Space Complexity in Resolution 2. Space lower bounds for Random Formulas 3.

172 Plan 1. Space Complexity in Resolution 2. Space lower bounds for Random Formulas 3.

172 Plan 1. Space Complexity in Resolution 2. Space lower bounds for Random Formulas 3. Combinatorial Characterization of width 4. Width vs Space 5. Feasible Interpolation for Resolution and size lower bounds 6. Proof Search,

1.52k views • 83 slides
Quantum symmetric spaces from refmection equation and module categories Makoto Yamashita (

Quantum symmetric spaces from refmection equation and module categories Makoto Yamashita (

Quantum symmetric spaces from refmection equation and module categories Makoto Yamashita ( ) joint works with Kenny De Commer, Sergey Neshveyev, Lars Tuset University of Oslo XXXVIII Workshop on Geometric Methods in Physics

844 views • 28 slides
Adventures in Impredicative Semantics Programming and Proving in Cedille Aaron Stump Computer

Adventures in Impredicative Semantics Programming and Proving in Cedille Aaron Stump Computer

Adventures in Impredicative Semantics Programming and Proving in Cedille Aaron Stump Computer Science The University of Iowa 1 / 23 ? Motivation and background for Cedille 2 / 23 A little history 3 / 23 System F (Girard, Reynolds, early

669 views • 32 slides

More recommend