Basic Computer Architecture CS520 Department of Computer Science - - PowerPoint PPT Presentation

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Basic Computer Architecture CS520 Department of Computer Science - - PowerPoint PPT Presentation

Basic Computer Architecture CS520 Department of Computer Science University of New Hampshire CPU Bus Memory CPU Central Processing Unit Contains: Control Unit: decides what to do Arithmetic/Logic Unit (ALU): does things


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SLIDE 1

Basic Computer Architecture

CS520 Department of Computer Science University of New Hampshire

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SLIDE 2

CPU Memory

Bus

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SLIDE 3

CPU

  • Central Processing Unit
  • Contains:

– Control Unit: decides what to do – Arithmetic/Logic Unit (ALU): does things – Registers: holds values

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SLIDE 4

Memory

  • Stores instructions and data
  • Array of cells
  • The index of a cell is its address.
  • Two concepts:

– address of cell – contents of cell

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SLIDE 5

10 1 2 3 4 5 6 7 8 9

Memory

address 1066 The memory cell with address 7 has contents 1066.

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SLIDE 6

Contents of Memory

  • Just bits.
  • There is no tag indicating what kind of value

(e.g. integer, floating-point, instruction, etc.) is in a cell.

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SLIDE 7

Example Instruction

  • Add contents of memory cell 10117 to register 6,

interpreting the two operands as integer values.

  • Note: the instruction must supply the

interpretation of the bits being manipulated!

  • This allows us to do tricky things, like store an

integer into memory and then interpret it later as an instruction.

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SLIDE 8

Fetch/Execute Cycle

  • Fetch
  • 1. Determine address of next instruction.
  • 2. Fetch the next instruction.
  • 3. Decode the next instruction.
  • 4. Fetch operands.
  • Execute
  • 5. Execute instruction.
  • 6. Store results.
  • 7. Go to 1.
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SLIDE 9

Program Counter

  • There is a dedicated register that tracks the

address of the memory cell that contains the next instruction to be executed.

  • The generic name for this register is the

program counter (PC).

  • On the Intel IA-32 architecture, for example,

the program counter is called the eip register (extended instruction pointer).

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SLIDE 10

Von Neumann Machine

  • The stored-program design is attributed to the

mathematician John Von Neumann*, so the design is also known as a Von Neumann machine.

  • Storing the program in memory enables:

– Compilers and linkers – Self-modifying programs – Just-in-time translation

  • e.g. Java bytecode to Intel machine code

* This attribution is controversial.

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SLIDE 11

Central Processing Unit Memory

Bus

Von Neumann Bottleneck

  • All data and instructions must pass via the bus.
  • Memory is much slower than CPU.

bottleneck