weeks Philip Rodrigues Data flow working group meeting 5 June 2019 - - PowerPoint PPT Presentation

weeks
SMART_READER_LITE
LIVE PREVIEW

weeks Philip Rodrigues Data flow working group meeting 5 June 2019 - - PowerPoint PPT Presentation

Self-trigger plans for DAQ weeks Philip Rodrigues Data flow working group meeting 5 June 2019 1 Aims Demonstrate something we can reasonably call a TPC self - trigger Prototype components of the FD DAQ design Measure resource


slide-1
SLIDE 1

Self-trigger plans for DAQ weeks

Philip Rodrigues Data flow working group meeting 5 June 2019

1

slide-2
SLIDE 2

Aims

  • Demonstrate something we can reasonably call a “TPC self-trigger”
  • Prototype components of the FD DAQ design
  • Measure resource requirements
  • DAQ weeks start in five days’ time: important to have a concrete plan in order to make the best

use of the time

  • Today: discuss the “data flow” aspects of the system, rather than “physics” of trigger formation

2

slide-3
SLIDE 3

System components (eventually)

3 FELIX BR FELIX BR FELIX BR

x10

FELIX BR FELIX BR Hit-sending BR

x10

APA

Trigger cand’te BR FELIX BR FELIX BR FELIX BR

x10

FELIX BR FELIX BR Hit-sending BR

x10

APA

Trigger cand’te BR Hit-finding FPGA Hit-sending BR

APA

Trigger cand’te BR

Module-level trigger BR Data flow

  • rchestrator

Possibly more APAs...

slide-4
SLIDE 4

Done so far

  • FELIX BR produces hits

continuously

  • Hits in hardware trigger windows

make it to offline

  • Hit-sending BR exists:
  • Included in RC
  • Receives hits (via ptmp) from FELIX
  • Hits in trigger window sometimes

make it to offline

  • When they do, they match up with

data

  • Rawdecoder sometimes crashes
  • Trigger candidate BR prototypes

exist

  • Alessandro & Giovanna wrote a

prototype that listens to timing board clock

  • David L is combining this with

listening to hits

  • TPSorted from Brett exists for

aggregation

4 FELIX BR FELIX BR FELIX BR

x10

FELIX BR FELIX BR Hit-sending BR

x10

APA

Trigger cand’te BR FELIX BR FELIX BR FELIX BR

x10

FELIX BR FELIX BR Hit-sending BR

x10

APA

Trigger cand’te BR Hit-finding FPGA Hit-sending BR

APA

Trigger cand’te BR

Module-level trigger BR Data flow

  • rchestrator
slide-5
SLIDE 5

Suggested order of tests

Start with TC BR issuing triggers (by sending TimingFragments to artdaq). Add MLT later 1. Check that hits make it into the TC BR 2. Make a random trigger in the TC BR. Test data flow. 3. Time-window the hits, with Brett’s TPWindow or otherwise 4. Very simple hit-dependent trigger (eg count nhits in a time window; make an nhits trigger (very large or very small) 5. Physics trigger (eg Easy horizontal muon trigger: at least N hits in every link in a small time window) Profit!!! Discussion on adding MLT on later slides

5

slide-6
SLIDE 6

Characterization

  • Throughput, latency, CPU usage
  • Physics performance: compare to CRT, maybe

6

slide-7
SLIDE 7

CPU Hit-finding tasks

  • Fix double hits
  • Time individual steps (pedestal finding, filtering, hit

finding)

  • Make nice plots of the steps with real data
  • Run with Filiberto’s reordered frames and measure CPU

usage

  • Finish rawdecoder
  • Stop saving triggered hits (technical reasons; hit-sending

BR sends them anyway)

7

slide-8
SLIDE 8

Hit-sending BR tasks

  • Use Brett’s TPReplay to “replay” dumped hits in dummy mode. Will be useful for testing without

needing hardware. Will require a straightforward change to DAQInterface/RC

  • Understand why hits don’t always make it to offline (maybe they’ve fallen off the circular buffer?)

8

From Pierre

slide-9
SLIDE 9

Trigger candidate and MLT BR tasks

  • Define format for TC message (ptmp?) and fragment (probably the same; not required)
  • Don’t hardcode input BRs. See https://its.cern.ch/jira/browse/NP04DAQ-76
  • Can we implement this in a way that facilitates standalone testing?
  • Order of moving from “just TC BR” to full system test. Rationales: TC BR ready before MLT ready

before DFO; make incremental changes to maximally-functional system at each stage (easier debugging): 1. TC BR triggers readout by pushing TimingFragment 2. TC BR triggers readout by pushing TriggerDecisionFragment (or whatever name) 3. Add MLT. TC BR sends TC to MLT. MLT triggers readout by pushing TriggerDecisionFragment 4. Add DFO. MLT sends TD to DFO. DFO triggers readout

9

slide-10
SLIDE 10

Other tasks

  • Talk to offline about possible changes:
  • Can they deal with an event without a TimingFragment?
  • Can we change the FELIX fragment format in a way which doesn’t break backwards compatibility? (This is what’s

needed to get hits-in-the-trigger-window directly out of the FELIX BR. Not strictly necessary)

  • Do they care about new fragments like TC/TD? I expect not
  • Convergence/tidying of code/configs. See https://its.cern.ch/jira/browse/NP04DAQ-73

10