Stuck-At and Transition N-Detect fault coverage of Pseudo Random - - PowerPoint PPT Presentation

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Stuck-At and Transition N-Detect fault coverage of Pseudo Random and Deterministic Patterns

Dwayne Burek BAST 2002

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 LogicVision, Inc., 2002

At-Speed Test Quality

2 4 6 8 10 12 14 16 18 90.00% 95.00% 98.00% 99.00% 99.70% 100.00%

# of Test Escapes Fault Coverage

Source: ITC ‘95 / Center for Reliable Computing, Stanford University

At-speed deterministic At-speed pseudo-random Low-speed deterministic 2 4 6 8 10 12 14 16 18 90.00% 95.00% 98.00% 99.00% 99.70% 100.00%

# of Test Escapes Fault Coverage

Source: ITC ‘95 / Center for Reliable Computing, Stanford University

At-speed deterministic At-speed pseudo-random Low-speed deterministic

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 LogicVision, Inc., 2002

Why N-Detect is Important

Source: ITC ’00 / Center for Reliable Computing, Stanford University Source: ITC ’00 / Center for Reliable Computing, Stanford University

G1 G2 G3 G4 G5 G6 Potential shorts G1 G2 G3 G4 G5 G6 Potential shorts

Defects Requiring Multiple Detections

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 LogicVision, Inc., 2002

Logic BIST N-Detect Results

10 20 30 40 50 60 70 80 90 5 10 15 20 25

Percentage of faults detected n times Number of detections

Deterministic: compaction level 1 Logic BIST Deterministic: compaction level 4 30 100

High-quality test

10 20 30 40 50 60 70 80 90 5 10 15 20 25

Percentage of faults detected n times Number of detections

Deterministic: compaction level 1 Logic BIST Deterministic: compaction level 4 30 100

High-quality test

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 LogicVision, Inc., 2002

Benchmark Circuit

Embedded Logic Test (ELT) Block Single Clock Domain Gate Count (extracted): 798192 Flop Count: 33403 Test Points: 244 (200 OBS, 44 CNTRL) DTPG Pattern Count:

Compression Level 1: 4037 Compression Level 4: 3060

DTPG Redundant Faults: 0.74 % DTPG Aborted Faults: 0.22 %

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 LogicVision, Inc., 2002

Logic BIST SA and TR Coverage

40 50 60 70 80 90 100 15 30 60 120 240 480 960 1920 3840 7680 15360 30720 32768 NO TP SA NO TP TR TP SA TP TR

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 LogicVision, Inc., 2002

Logic BIST N-Detect

84 86 88 90 92 94 96 98 100 1 5 10 15 20 25 30 TP SA TP TR NO TP SA NO TP TR

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 LogicVision, Inc., 2002

Logic BIST vs SCAN ATPG (SA)

80 82 84 86 88 90 92 94 96 98 100 1 5 10 15 20 25 30 LB SA COMP1 SA COMP4 SA

No Test Points

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 LogicVision, Inc., 2002

Logic BIST vs SCAN ATPG (TR)

65 70 75 80 85 90 95 100 1 5 10 15 20 25 30 LB TR COMP1 TR COMP4 TR

No Test Points

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 LogicVision, Inc., 2002

Logic BIST vs SCAN ATPG (SA)

82 84 86 88 90 92 94 96 98 100 1 5 10 15 20 25 30 LB SA COMP1 SA COMP4 SA

244 Test Points

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 LogicVision, Inc., 2002

Logic BIST vs SCAN ATPG (TR)

65 70 75 80 85 90 95 100 1 5 10 15 20 25 30 LB TR COMP1 TR COMP4 TR

244 Test Points

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 LogicVision, Inc., 2002

Conclusion

At-Speed pseudo random testing provides

superior quality over both low-speed and at- speed deterministic:

Confirmed by Stanford CRC, ITC ’95. 4 escapes corresponds to DPM level of 720

Higher levels of Stuck-At and Transition N-

Detect coverage result in higher quality test.

Logic BIST Stuck-At and Transition N-Detect

coverage can be significantly higher than compacted deterministic ATPG patterns.