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Stealthy Opaque Predicates in Hardware - Obfuscating Constant Expressions at Negligible Overhead Max Hoffmann, Christof Paar Ruhr University Bochum, Horst-Grtz Institute for IT-Security, Germany CHES 2018 | Amsterdam 10.09.2018 Obfuscation


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CHES 2018 | Amsterdam 10.09.2018

Stealthy Opaque Predicates in Hardware -

Obfuscating Constant Expressions at Negligible Overhead

Max Hoffmann, Christof Paar Ruhr University Bochum, Horst-Görtz Institute for IT-Security, Germany

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Stealthy Opaque Predicates in Hardware | CHES 2018 | 10.09.2018

Obfuscation

Source: www.constructionknowledge.net

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Why Obfuscation?

High-level Description Finished Product “easy” “not that easy”

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Why Obfuscation?

High-level Description Finished Product “easy” “not that easy” aes.c aes.vhd

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Why Obfuscation?

High-level Description Finished Product “easy” “not that easy” 01010100101 01000100101 01110101010 01101010010 aes.c aes.vhd

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Why Obfuscation?

High-level Description Finished Product “easy” “insanely difficult” Obfuscation

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  • One target in software is control flow obfuscation.

Software Obfuscation

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  • One target in software is control flow obfuscation.

Software Obfuscation

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  • Opaque Predicates are used as a basic building block.

Software Obfuscation

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  • Opaque Predicates are used as a basic building block.
  • An opaque predicate:

– is an expression – looks like having a dynamic value – evaluates to a constant, known value

Software Obfuscation

Example: (x * (x + 1)) % 2 == 0

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  • Opaque Predicates are used as a basic building block.
  • An opaque predicate:

– is an expression – looks like having a dynamic value – evaluates to a constant, known value

  • Meant to harden against static analysis.

Software Obfuscation

  • Static Analysis: analysis performed solely on a static data, e.g., a binary.
  • Dynamic Analysis: analysis performed during operation, e.g., while

executing a binary. Example: (x * (x + 1)) % 2 == 0

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  • Control flow graph of a

static analyzer:

Example: Software Opaque Predicates

if ((x * (x + 1)) % 2 == 0): foo() else bar() … check (x*(x+1))%2 foo() bar() =0 ≠0

  • “True” control flow graph:

… foo()

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A Software Obfuscation Technique in Hardware?

  • How can a software obfuscation technique help in hardware?
  • Obfuscation should harden against reverse engineering.
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A Software Obfuscation Technique in Hardware?

  • How can a software obfuscation technique help in hardware?
  • Obfuscation should harden against reverse engineering.
  • Reverse engineers rarely analyze an entire design.
  • Mostly: small parts of a design.
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A Software Obfuscation Technique in Hardware?

  • How can a software obfuscation technique help in hardware?
  • Obfuscation should harden against reverse engineering.
  • Reverse engineers rarely analyze an entire design.
  • Mostly: small parts of a design.
  • Goal: hide as much information as possible.

reduces starting points for reverse engineers. makes understanding of any component harder.

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Example: Hardware Reversing

if a = "0110" then

  • utput <= ‘1’;

end if; if a = b then

  • utput <= ‘1’;

end if;

vs.

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Use OPs to hide information introduced by constant signals.

Example: Hardware Reversing

if a = "0110" then

  • utput <= ‘1’;

end if; if a = b then

  • utput <= ‘1’;

end if;

vs.

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PREVIOUS WORK

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  • Only one prior work on opaque predicates.
  • Sergeichik et al. presented LFSR-based OPs in 2014 [1].

Translation to Hardware

[1] Sergeichik and Ivaniuk. "Implementation of opaque predicates for fpga designs hardware obfuscation." (JICMS, 2014).

1 1 1 1 … <feedback logic> OR 1

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  • Problem: Easy to detect, uncommon structure
  • Removal via static analysis

demonstrated in [1].

Stealthiness

1 1 1 1 … <feedback logic> OR 1

[1] Wallat, Fyrbiak, Schlögel, and Paar. “A Look at the Dark Side of Hardware Reverse Engineering – A Case Study” (IVSW, 2017)

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  • Problem: Easy to detect, uncommon structure
  • Removal via static analysis

demonstrated in [1].

  • Desired Metric: “Stealthiness“

– Impossible (?) to measure – Human factor plays a role – Different in hardware and software

Stealthiness

1 1 1 1 … <feedback logic> OR 1

[1] Wallat, Fyrbiak, Schlögel, and Paar. “A Look at the Dark Side of Hardware Reverse Engineering – A Case Study” (IVSW, 2017)

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OPAQUE PREDICATES IN HARDWARE

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  • Stealthiness: use common structures.
  • Try to use existing circuitry.

Hardware OPs – Idea

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  • Stealthiness: use common structures.
  • Try to use existing circuitry.
  • Observation:

– Signals are changing constantly. – A signal’s value is only important while evaluated.

Hardware OPs – Idea

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  • Stealthiness: use common structures.
  • Try to use existing circuitry.
  • Observation:

– Signals are changing constantly. – A signal’s value is only important while evaluated. → Use an existing signal which

  • 1. has the required state whenever we need it
  • 2. switches “randomly” when not needed.

Hardware OPs – Idea

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Example: Hardware OPs

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  • Constant value required in Work1, Work2, and Work3.
  • Multiple options to use the state of an FSM as an OP.

Example: Hardware OPs

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  • Constant value required in Work1, Work2, and Work3.
  • Multiple options to use the state of an FSM as an OP.

Example: Hardware OPs

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  • Constant value required in Work1, Work2, and Work3.
  • Multiple options to use the state of an FSM as an OP.

Example: Hardware OPs

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  • Example:

– Constant 11010002 to be obfuscated. – 5-bit FSM passes 3 states during the processing period.

Hardware OPs

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Hardware OPs

  • 1st State:

1 1 1 1 1

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Hardware OPs

  • 2nd State:

1 1 1 1 1

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Hardware OPs

  • 3rd State:

1 1 1 1 1 1

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Hardware OPs

  • 4th State:

1 1

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  • Very stealthy: existing FSMs are used.
  • Zero additional gates (in theory…)

Hardware OPs

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  • Very stealthy: existing FSMs are used.
  • Zero additional gates (in theory…)
  • Applicable to nearly all designs.
  • Considerably increases reversing effort:

Reversing of control- and data-path required for identification of constants.

Hardware OPs

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  • Very stealthy: existing FSMs are used.
  • Zero additional gates (in theory…)
  • Applicable to nearly all designs.
  • Considerably increases reversing effort:

Reversing of control- and data-path required for identification of constants.

  • Applicable to ASICs and FPGAs.
  • Forces a reverse engineer to apply dynamic analysis.

Hardware OPs

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  • If no suitable FSM available, add a new FSM-like module.

– Make it reset outside of the processing period. – Make it stabilize in a known state after some cycles. – Generate OP value from stable state.

  • Still stealthy (FSMs are common).
  • Stabilizing FSMs are also common (DONE state).

Hardware OPs

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CASE STUDIES

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Scenario

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Scenario

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Results

Platform: XILINX Artix-7 35T FPGA Legend: Unobfuscated: no opaque predicates were used Strategy 1:

  • paque predicate from existing circuitry

Strategy 2: new circuitry for the opaque predicate

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APPLICATION: WATERMARKING

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Watermarking

[1] Schmid, Moritz, and Ziener, Daniel, and Teich, Jurgen. "Netlist-level IP protection by watermarking for LUT-based FPGAs." (FPT 2008)

  • A watermark enables identification of IP-

theft.

  • A vendor can inspect products for

presence of his watermark.

  • Schmid et al. proposed a watermarking

scheme for FPGAs which implements a watermark into LUT configurations [1].

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  • A LUT is configured by defining it’s output values.
  • Example:
  • These configurations can be read from the bitstream of an FPGA.

FPGA LUT Configuration

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  • Idea: fix some inputs to GND.

Watermarking by Schmid et al.

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Watermarking by Schmid et al.

  • Idea: fix some inputs to GND.
  • Configuration bits for other cases become effectively unused.
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Watermarking by Schmid et al.

  • Idea: fix some inputs to GND.
  • Configuration bits for other cases become effectively unused.
  • Embed watermark there.
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Applying OPs

  • Netlist-level attacker was included in attacker model.
  • Problem: Tracing GND to LUTs  detected  easy to remove the watermark.
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Applying OPs

  • Netlist-level attacker was included in attacker model.
  • Problem: Tracing GND to LUTs  detected  easy to remove the watermark.
  • Solution: Use our OPs instead of GND.
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CONCLUSION

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Conclusion

  • Novel technique for opaque predicates in hardware (ASICs + FPGAs).
  • Strong technique (discussion in the paper).
  • Instantiation strategies:

– Existing circuitry. – Additional circuitry.

  • Practical evaluation.
  • Demonstrate potential to mitigate existing attacks.
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CHES 2018 | Amsterdam

Thank You For Your Attention! Any Questions?

10.09.2018