Input Acceptance of Time-Warping Transactional Memory Nuno Diegues - - PowerPoint PPT Presentation

▶
input acceptance of time warping transactional memory
SMART_READER_LITE
LIVE PREVIEW

Input Acceptance of Time-Warping Transactional Memory Nuno Diegues - - PowerPoint PPT Presentation

Feb 18, 2024 162 likes •551 views

Input Acceptance of Time-Warping Transactional Memory Nuno Diegues and Paolo Romano ndiegues@gsd.inesc-id.pt Nuno Diegues 1/20 Context Time-warp [DISC13] minimize spurious abort Nuno Diegues 2/20 Context Time-warp [DISC13]

slide-1
SLIDE 1

Input Acceptance of Time-Warping Transactional Memory

Nuno Diegues and Paolo Romano

ndiegues@gsd.inesc-id.pt

Nuno Diegues 1/20

slide-2
SLIDE 2

Context

Time-warp [DISC13] — minimize spurious abort

Nuno Diegues 2/20

slide-3
SLIDE 3

Context

Time-warp [DISC13] — minimize spurious abort Input Acceptance [OPODIS08] — measure

Nuno Diegues 2/20

slide-4
SLIDE 4

Context

Time-warp [DISC13] — minimize spurious abort Input Acceptance [OPODIS08] — measure Analysis results from the paper

Nuno Diegues 2/20

slide-5
SLIDE 5

Spurious Aborts in TM

To guarantee a given correctness level, a TM aborts transactions.

Nuno Diegues 3/20

slide-6
SLIDE 6

Spurious Aborts in TM

Permissiveness: If it only aborts a transaction when the resulting history (without the abort) does not respect some target correctness criterion

Nuno Diegues 4/20

slide-7
SLIDE 7

Spurious Aborts in TM

Permissiveness: If it only aborts a transaction when the resulting history (without the abort) does not respect some target correctness criterion Impractical to achieve [DISC08] [SPAA09] Serializability Graph Testing — Bernstein’87

Nuno Diegues 4/20

slide-8
SLIDE 8

Spurious Aborts in TM

Most TM algorithms: function commit(Transaction tx): for each ‹datum, version›∈ tx.readSet do if not latestVersion(datum, version) then abort(tx)

Nuno Diegues 5/20

slide-9
SLIDE 9

Problem

Nuno Diegues 6/20

slide-10
SLIDE 10

Problem

read x

T1

read y write y read x write x

rw

T2

Nuno Diegues 6/20

slide-11
SLIDE 11

Problem

read x

T1

read y write y read x write x

rw

T2 T2 T1

time serialization Nuno Diegues 6/20

slide-12
SLIDE 12

Problem

read x

T1

read y write y read x write x

rw

T2 T2 T1

time

rw

serialization Nuno Diegues 6/20

slide-13
SLIDE 13

Problem

read x

T1

read y write y read x write x

rw

T2 T2

serialization Nuno Diegues 6/20

slide-14
SLIDE 14

Problem

read x

T1

read y write y read x write x

rw

T2 T2

serialization

T1

rw

Nuno Diegues 6/20

slide-15
SLIDE 15

Problem

read x

T1

read y write y read x write x

rw

T2 T2

serialization

T1

rw

Time-warp commit

Nuno Diegues 6/20

slide-16
SLIDE 16

Time-warp

When can we not apply this idea?

Nuno Diegues 7/20

slide-17
SLIDE 17

Time-warp

When can we not apply this idea? Look out for a specific structure

Nuno Diegues 7/20

slide-18
SLIDE 18

Time-warp

When can we not apply this idea? Look out for a specific structure: Three transactions connected

◮ a triad

A

write y read y

rw

T

write x

B

read x

rw

Nuno Diegues 7/20

slide-19
SLIDE 19

Time-warp

When can we not apply this idea? Look out for a specific structure: Three transactions connected

◮ a triad

The link between all three

◮ the pivot

A

write y read y

rw

T

write x

B

read x

rw

Pivot Nuno Diegues 7/20

slide-20
SLIDE 20

Time-warp

When can we not apply this idea? Look out for a specific structure: Three transactions connected

◮ a triad

The link between all three

◮ the pivot

Abort if:

◮ Completes a triad ◮ Whose pivot time-warp

commits

A

write y read y

rw

T

write x

B

read x

rw

Pivot Nuno Diegues 7/20

slide-21
SLIDE 21

Alternative approaches to Time-Warping

Interval-Based: AVSTM [DISC08], TSTM [TRANSACT08], IR_VWC_P [ICA3PP11]

Nuno Diegues 8/20

slide-22
SLIDE 22

Alternative approaches to Time-Warping

Interval-Based: AVSTM [DISC08], TSTM [TRANSACT08], IR_VWC_P [ICA3PP11] bounds for serialization order refined with transaction execution imposed by concurrent commits choose one value in the final interval

Nuno Diegues 8/20

slide-23
SLIDE 23

Comparison on reduction of spurious aborts

Plethora of algorithms: all those mentioned above visible reads deferred updates single-version vs multi-version

Nuno Diegues 9/20

slide-24
SLIDE 24

Input Acceptance

Sequences of input events to TM: P = b1b2rx

1 wx 2 c2

Nuno Diegues 10/20

slide-25
SLIDE 25

Input Acceptance

Sequences of input events to TM: P = b1b2rx

1 wx 2 c2

Input P is rejected if TM aborts one (or more) transactions

Nuno Diegues 10/20

slide-26
SLIDE 26

Input Acceptance

Sequences of input events to TM: P = b1b2rx

1 wx 2 c2

Input P is rejected if TM aborts one (or more) transactions Input class is a set of input patterns: C = π∗(rx

i ¬c∗ i wx j )ε¬c∗ i cjπ∗

Nuno Diegues 10/20

slide-27
SLIDE 27

Input Acceptance

Sequences of input events to TM: P = b1b2rx

1 wx 2 c2

Input P is rejected if TM aborts one (or more) transactions Input class is a set of input patterns: C = π∗(rx

i ¬c∗ i wx j )ε¬c∗ i cjπ∗

Input class is rejected if all input patterns are rejected

Nuno Diegues 10/20

slide-28
SLIDE 28

So far...

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL SSTM DSTM TinySTM SwissTM WSTM TL2 JVSTM Nuno Diegues 11/20

slide-29
SLIDE 29

Updated hierarchy

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL AbortsAvoider SSTM Interval based (IB)

TWM DSTM TinySTM SwissTM

WSTM TL2

TSTM IR_VWC_P AVSTM JVSTM SMV MV-IWIR

Nuno Diegues 12/20

slide-30
SLIDE 30

MV-Permissiveness

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL AbortsAvoider SSTM Interval based (IB)

TWM DSTM TinySTM SwissTM

WSTM TL2

TSTM IR_VWC_P AVSTM JVSTM SMV MV-IWIR

Abort-free read-only transactions

Nuno Diegues 13/20

slide-31
SLIDE 31

Interval-Based

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL AbortsAvoider SSTM Interval based (IB)

TWM DSTM TinySTM SwissTM

WSTM TL2

TSTM IR_VWC_P AVSTM JVSTM SMV MV-IWIR

May also abort with one "miss", but with more constraints

Nuno Diegues 14/20

slide-32
SLIDE 32

Permissive solutions

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL AbortsAvoider SSTM Interval based (IB)

TWM DSTM TinySTM SwissTM

WSTM TL2

TSTM IR_VWC_P AVSTM JVSTM SMV MV-IWIR

Can abort a transaction in serializable histories

Nuno Diegues 15/20

slide-33
SLIDE 33

Time-Warping

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL AbortsAvoider SSTM Interval based (IB)

TWM DSTM TinySTM SwissTM

WSTM TL2

TSTM IR_VWC_P AVSTM JVSTM SMV MV-IWIR

Time-warping is also MV-Permissive and does not abort with one "miss"

Nuno Diegues 16/20

slide-34
SLIDE 34

Time-Warping vs Interval-Based

Visible Writes Visible Reads (VWVR) Visible Writes Invisible Reads (VWIR) Invisible Writes Invisible Reads (IWIR) Serializability Graph Testing (SGT)

SXM 2PL AbortsAvoider SSTM Interval based (IB)

TWM DSTM TinySTM SwissTM

WSTM TL2

TSTM IR_VWC_P AVSTM JVSTM SMV MV-IWIR

Tricker case, detailed in the paper

Nuno Diegues 17/20

slide-35
SLIDE 35

Summary

Reduction of spurious aborts Time-Warping Input Acceptance

Nuno Diegues 18/20

slide-36
SLIDE 36

References

SXM: R. Guerraoui, M. Herlihy and B. Pochon. Polymorphic contention management. DISC ’05. DSTM: M. Herlihy, V. Luchangco, M. Moir and W. Scherer. Software transactional memory for dynamic-sized data structures. PODC ’03. TinySTM: P. Felber, C. Fetzer and T. Riegel. Dynamic performance tuning of word-based software transactional memory. PPoPP ’08. SwissTM: A. Dragojević, R. Guerraoui M. Kapalka. Stretching transactional memory. PLDI ’09. WSTM: K. Fraser and T. Harris. Concurrent programming without locks. TOCS ’07. TL2: D. Dice, O. Shalev and N. Shavit. Transactional locking II. DISC ’06. JVSTM: S. Fernandes and J. Cachopo. Lock-free and scalable multi-version software transactional memory. PPoPP ’11. SMV: D. Perelman, A. Byshevsky, O. Litmanovich, and I. Keidar. SMV: selective multi-versioning STM. DISC ’11. IR_VWC_P: T. Crain,D. Imbs and M. Raynal. Read invisibility, virtual world consistency and probabilistic permissiveness are compatible. ICA3PP ’12. AVSTM: R. Guerraoui, T. Henzinger and V. Singh. Permissiveness in Transactional Memories. DISC ’08. TSTM: U. Aydonat and T. Abdelrahman. Relaxed Concurrency Control in Software Transactional Memory. TPDS ’12. TWM: N. Diegues and P. Romano. Enhancing Permissiveness in Transactional Memory via Time-Warping. TR INESC-ID. AbortsAvoider: Keidar, Idit and Perelman, Dmitri. On avoiding spare aborts in transactional memory. SPAA ’09. SSTM: V. Gramoli, D. Harmanci, P. Felber. Toward a Theory of Input Acceptance for Transactional

  • Memories. OPODIS ’08.

Nuno Diegues 19/20

slide-37
SLIDE 37

Questions?

Thank you

Nuno Diegues 20/20