DUNE UK Hardware Activies Giles Barr, David Cussans , Alan Watson - PowerPoint PPT Presentation

DUNE UK Hardware Activies Giles Barr, David Cussans , Alan Watson 27 th April 2018

Outline • Describe Carrier board for Oxford/SLAC DPM • Focussed on providing platform to test ideas in R&D packages. • ATCA based • PCIe based 2 UK Hardware Activities| DUNE DAQ Meeting

DPM Hardware • Institutes: Oxford (+SLAC) (+ ?) • 2 week deliverable: Schedule and task-list for testing. • 6 month deliverable: DPM boards • Sub-tasks • Complete DPM PCB development • Deliver tested modules • Develop firmware for RAM and NVM management • See talk by Matt Graham: https://indico.fnal.gov/event/16944/contribution/1/material/slides/0.pdf UK Hardware Activities| DUNE DAQ Meeting 3

DPM Carrier • Institutes: Birmingham, Bristol, Oxford, UCL, RAL, Imperial(?) • Input from SLAC • Effort: Schematic Capture/PCB layout 0.5 + 0.2 + 0.2 FTE. Signal integrity 0.1 FTE , Firmware 0.5 + 0.5 + 0.5 • 2 week deliverable: Investigate feasibility of team working and schedule. Specify hardware and tasks for vertical slice test. • 3 month deliverable: Schematics and design review, initial PCB layout. • 6 month deliverable: DPM Carrier, infrastructure firmware. • 12 month deliverable: Demonstration of protoDUNE readout with DPM carrier(vertical slice-test of front-end hardware). • Sub-tasks • Infrastructure firmware, software • Separate daughter-board for optics to WIB UK Hardware Activities| DUNE DAQ Meeting 4

DPM Carrier Aims • Be able to test three scenarios: • WIB → DPM → Carrier FPGA → CPU (PCIe) • WIB → Carrier FPGA → CPU(PCIe) • WIB → Carrier FPGA → DPM → Carrier FPGA → CPU • Basic functionality of DPM will be tested with COB and perhaps a variant of SLAC Jig Board • Act as platform for vertical slice test • Assume 1.28GBit/s 8b/10b encoded data from WIB UK Hardware Activities| DUNE DAQ Meeting 5

DPM Carrier Block Diagram UK Hardware Activities| DUNE DAQ Meeting 6

WIB → DPM → Carrier FPGA → CPU ● Topologically identical to connecting DPM in ATCA to Felix via 10GBit/s links UK Hardware Activities| DUNE DAQ Meeting 7

WIB → DPM → Carrier FPGA → CPU UK Hardware Activities| DUNE DAQ Meeting 8

WIB → Carrier FPGA → CPU(PCIe) / WIB → Carrier FPGA → DPM → Motherboard FPGA → CPU UK Hardware Activities| DUNE DAQ Meeting 9

SP TPC CE Test Platform ● Provide light-weight test system for CE prototype WIB UK Hardware Activities| DUNE DAQ Meeting 10

DPM Carrier Starting Point • Aim to use an existing PCIe format card • + firmware + test software • Options: • Felix ( BNL FLX 711/712 board ) ■ Firmware is semi-open ( sign up to collaboration, agree not to “Fork” or share with non collaboration members ) ■ Discussing with BNL if access is available to hardware design and collaboration. • CMS PCIe platform ■ Less mature than Felix • Open Hardware system ■ E.g. NetFPGA-Sume ● Hardware similar to Felix ● Firmware + Hardware semi-open UK Hardware Activities| DUNE DAQ Meeting 11

Plans • Select starting point for PCIe platform ( Felix / CMS/ NetFPGA / Other? ) • Political/financial as well as technical constraints. • In parallel put in place systems for design interchange, version management, etc. • Should be done at collaboration level ( c.f. CERN EDMS ) but only DUNE design management system seems to be for engineering data. • Learn (move on from) protoDUNE. ■ All new firmware / software in collaboration wide repository. • Commence hardware + firmware + software design in parallel 12 David Cussans | UK DAQ EoI Meeting