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DATABASE SYSTEM IMPLEMENTATION GT 4420/6422 // SPRING 2019 // @JOY_ARULRAJ LECTURE #11: OLTP INDEXES (PART 1) 2 ADMINISTRIVIA Midterm-Topics HW#3 Programming Assignment Due Date Project Topics 3 TODAYS AGENDA T-Tree Skip List Bw-Tree


  1. 54 SKIP LISTS: DELETE Delete K5 Levels End ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N Del Del Del Del Del Del Del V1 V2 V3 V4 V5 V6 false false false false false true false

  2. 55 SKIP LISTS: DELETE Delete K5 Levels End ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N Del Del Del Del Del Del Del V1 V2 V3 V4 V5 V6 false false false false false true false

  3. 56 SKIP LISTS: DELETE Delete K5 Levels End ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N Del Del Del Del Del Del Del V1 V2 V3 V4 V5 V6 false false false false false true false

  4. 57 SKIP LISTS: DELETE Delete K5 Levels End ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N Del Del Del Del Del Del Del V1 V2 V3 V4 V5 V6 false false false false false true false

  5. 58 SKIP LISTS: DELETE Delete K5 Levels End ∞ P=N/4 ∞ K2 K4 P=N/2 ∞ K1 K2 K3 K4 K6 P=N Del Del Del Del Del V1 V2 V3 V4 V6 false false false false false

  6. 59 CONCURRENT SKIP LIST Be careful about how you order operations. If the DBMS invokes operation on the index, it can never “fail” → A txn can only abort due to higher-level conflicts. → If a CaS fails, then the index will retry until it succeeds.

  7. 60 SKIP LIST OPTIMIZATIONS Reducing RAND() invocations. Packing multiple keys in a node. Reverse iteration with a stack. Reusing nodes with memory pools. SKIP LISTS: DONE RIGHT Ticki(?) Blog 2016

  8. 61 SKIP LIST: COMBINE NODES Store multiple keys in a single node. → Insert Key: Find the node where it should go and look for a free slot. Perform CaS to store new key. If no slot is available, insert new node. → Search Key: Perform linear search on keys in each node. K2 K3 K6 V2 V3 V6 Source: Ticki

  9. 62 SKIP LIST: COMBINE NODES Store multiple keys in a single node. → Insert Key: Find the node where it should go and look for a free slot. Perform CaS to store new key. If no slot is available, insert new node. → Search Key: Perform linear search on keys in each node. K2 K3 K6 - V2 V3 V6 - Source: Ticki

  10. 63 SKIP LIST: COMBINE NODES Store multiple keys in a single node. → Insert Key: Find the node where it should go and look for a free slot. Perform CaS to store new key. If no slot is available, insert new node. → Search Key: Perform linear search on keys in each node. Insert K4 K2 K3 K6 - V2 V3 V6 - Source: Ticki

  11. 64 SKIP LIST: COMBINE NODES Store multiple keys in a single node. → Insert Key: Find the node where it should go and look for a free slot. Perform CaS to store new key. If no slot is available, insert new node. → Search Key: Perform linear search on keys in each node. Insert K4 K2 K3 K6 - V2 V3 V6 - Source: Ticki

  12. 65 SKIP LIST: COMBINE NODES Store multiple keys in a single node. → Insert Key: Find the node where it should go and look for a free slot. Perform CaS to store new key. If no slot is available, insert new node. → Search Key: Perform linear search on keys in each node. Insert K4 K2 K3 K6 K4 - V2 V3 V6 V4 - Source: Ticki

  13. 66 SKIP LIST: COMBINE NODES Store multiple keys in a single node. → Insert Key: Find the node where it should go and look for a free slot. Perform CaS to store new key. If no slot is available, insert new node. → Search Key: Perform linear search on keys in each node. Search K6 K2 K3 K6 K4 - V2 V3 V6 V4 - Source: Ticki

  14. 67 SKIP LISTS: REVERSE SEARCH Find [K4,K2] Levels End ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  15. 68 SKIP LISTS: REVERSE SEARCH Find [K4,K2] Levels End ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  16. 69 SKIP LISTS: REVERSE SEARCH Find [K4,K2] Levels End K2<K5 ∞ K5 P=N/4 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  17. 70 SKIP LISTS: REVERSE SEARCH Find [K4,K2] Levels End K2<K5 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  18. 71 SKIP LISTS: REVERSE SEARCH Find [K4,K2] Levels End K2<K5 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  19. 72 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] Levels End K2<K5 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  20. 73 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] Levels End K2<K5 K2 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  21. 74 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] Levels End K3 K2<K5 K2 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  22. 75 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] K4 Levels End K3 K2<K5 K2 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  23. 76 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] K4 Levels End K3 K2<K5 K2 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  24. 77 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] K4 Levels End K3 K2<K5 K2 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  25. 78 SKIP LISTS: REVERSE SEARCH Stack: Find [K4,K2] K4 Levels End K3 K2<K5 K2 ∞ K5 P=N/4 K2=K2 ∞ K2 K4 K5 P=N/2 ∞ K1 K2 K3 K4 K5 K6 P=N V1 V2 V3 V4 V5 V6 Source: Mark Papadakis

  26. 79 OBSERVATION Because CaS only updates a single address at a time, this limits the design of our data structures → We cannot have reverse pointers in a latch-free concurrent Skip List. → We cannot build a latch-free B+Tree. What if we had an indirection layer that allowed us to update multiple addresses atomically?

  27. 80 BW-TREE Latch-free B+Tree index → Threads never need to set latches or block. Key Idea #1: Deltas → No updates in place → Reduces cache invalidation. Key Idea #2: Mapping Table → Allows for CaS of physical locations of pages. THE BW-TREE: A B-TREE FOR NEW HARDWARE ICDE 2013

  28. 81 BW-TREE: MAPPING TABLE Mapping Table Index Page PID Addr 101 102 103 104 Logical Pointer Physical Pointer

  29. 82 BW-TREE: MAPPING TABLE Mapping Table Index Page PID Addr 101 101 102 103 102 104 104 Logical Pointer Physical Pointer

  30. 83 BW-TREE: MAPPING TABLE Mapping Table Index Page PID Addr 101 101 102 103 102 104 104 Logical Pointer Physical Pointer

  31. 84 BW-TREE: MAPPING TABLE Mapping Table Index Page PID Addr 101 102 103 104 Logical Pointer Physical Pointer

  32. 85 BW-TREE: MAPPING TABLE Mapping Table Index Page PID Addr 102 104 101 102 103 102 104 104 Logical Pointer Physical Pointer

  33. 86 BW-TREE: DELTA UPDATES Mapping Table PID Addr 101 102 103 104 Page 102 Logical Pointer Physical Pointer Source: Justin Levandoski

  34. 87 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. PID Addr 101 102 103 104 Page 102 Logical Pointer Physical Pointer Source: Justin Levandoski

  35. 88 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. PID Addr 101 102 ▲ Insert 50 103 104 Page 102 Logical Pointer Physical Pointer Source: Justin Levandoski

  36. 89 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. PID Addr 101 Delta physically points to 102 base page. ▲ Insert 50 103 104 Page 102 Logical Pointer Physical Pointer Source: Justin Levandoski

  37. 90 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. PID Addr 101 Delta physically points to 102 base page. ▲ Insert 50 103 Install delta address in 104 physical address slot of Page 102 Logical mapping table using CAS. Pointer Physical Pointer Source: Justin Levandoski

  38. 91 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. PID Addr 101 Delta physically points to 102 base page. ▲ Insert 50 103 Install delta address in 104 physical address slot of Page 102 Logical mapping table using CAS. Pointer Physical Pointer Source: Justin Levandoski

  39. 92 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. PID Addr 101 Delta physically points to 102 base page. ▲ Insert 50 103 Install delta address in 104 physical address slot of Page 102 Logical mapping table using CAS. Pointer Physical Pointer Source: Justin Levandoski

  40. 93 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. ▲ Delete 48 PID Addr 101 Delta physically points to 102 base page. ▲ Insert 50 103 Install delta address in 104 physical address slot of Page 102 Logical mapping table using CAS. Pointer Physical Pointer Source: Justin Levandoski

  41. 94 BW-TREE: DELTA UPDATES Mapping Table Each update to a page produces a new delta. ▲ Delete 48 PID Addr 101 Delta physically points to 102 base page. ▲ Insert 50 103 Install delta address in 104 physical address slot of Page 102 Logical mapping table using CAS. Pointer Physical Pointer Source: Justin Levandoski

  42. 95 BW-TREE: SEARCH Mapping Table ▲ Delete 48 PID Addr 101 102 ▲ Insert 50 103 104 Page 102 Logical Pointer Physical Pointer

  43. 96 BW-TREE: SEARCH Mapping Table Traverse tree like a regular B+tree. ▲ Delete 48 PID Addr 101 102 ▲ Insert 50 103 104 Page 102 Logical Pointer Physical Pointer

  44. 97 BW-TREE: SEARCH Mapping Table Traverse tree like a regular B+tree. ▲ Delete 48 PID Addr 101 If mapping table points to 102 delta chain, stop at first ▲ Insert 50 103 occurrence of search key. 104 Page 102 Logical Pointer Physical Pointer

  45. 98 BW-TREE: SEARCH Mapping Table Traverse tree like a regular B+tree. ▲ Delete 48 PID Addr 101 If mapping table points to 102 delta chain, stop at first ▲ Insert 50 103 occurrence of search key. 104 Otherwise, perform binary Page 102 Logical search on base page. Pointer Physical Pointer

  46. 99 BW-TREE: CONTENTION UPDATES Mapping Table PID Addr 101 102 ▲ Insert 50 103 104 Page 102 Logical Pointer Physical Pointer

  47. 100 BW-TREE: CONTENTION UPDATES Mapping Table PID Addr 101 Threads may try to install 102 updates to same state of the ▲ Insert 50 103 page. 104 Page 102 Logical Pointer Physical Pointer

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