A rule-based Control and Verification framework in ATLAS Trigger-DAQ
Presented by Andrei Kazarov CERN-ATD/PNPI Petersburg
2006 Conference for Computing in High Energy and Nuclear Physics 13-17 Feb. 2006 Mumbai, India
A rule-based Control and Verification framework in ATLAS - - PowerPoint PPT Presentation
A rule-based Control and Verification framework in ATLAS Trigger-DAQ 2006 Conference for Computing in High Energy and Nuclear Physics 13-17 Feb. 2006 Mumbai, India Presented by Andrei Kazarov CERN-ATD/PNPI Petersburg Presentation contents
2006 Conference for Computing in High Energy and Nuclear Physics 13-17 Feb. 2006 Mumbai, India
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Part one: Expert system-based architecture of Run
Goals Design and Architecture Implementation
Part two: DVS: diagnostics and verification
DVS overview Recent developments Use for ATLAS commissioning
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ATLAS T/DAQ is composed of a huge number of
1800 read-out VME boards 1800 fiber links 150 ROS PCs each hosting 4 ROB-IN cards 500 LVL2 PCs 90 SFI PCs ~2000 EF PCs ~30 SFO PCs ~50 infrastructure PCs (file servers) ~200 Ethernet switches And O(10000) applications running
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Detect problems as early as possible by means of probing the
Make use of system’s developers expertise (knowledge) Automate verification of a large system Minimize system down-time, using recovery procedures based
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Framework approach: system shall be configurable and
Expert system approach: system’s behavior is described in rule-
Hierarchical distributed architecture of the Run Control system,
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Control `` Operator Run Control DVS Access Manager Process Manager Resource Manager Setup CLIPS Test Manager Integrated GUI
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RC RC = Run Controller Root Controller RC RC RC RC RC RC RC RC RC RC RC RC RC RC RC Subsystem Controllers Leaf Controllers H A R D W A R E A A A A A A A A A A A = DataFlow Application Operator errors, status commands
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Each Run Controller is an implementation of a Finite
Each controller has a state, determined by states of
A simple rule is just ‘if all my children are in state A,
More complex recovery rules should analyze errors
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Diagnostics and Verification System
Configure a test for any component in the system Have a testable view on the particular
Automate testing of the system Make diagnostics conclusion in case of a problem
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Setup component is a ‘boot-strap controller’ for the
It brings the system to a state where it can accept
It uses DVS to verify in depth system’s h/w in order
It contains additional rules to start, restart and verify
Functionality of applications are also confirmed by
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DVS Controller Operator Expert Verify Component Diagnose Errors Delevop & Configure Test Browse Testable Components
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DVS Expert Operator Test Repository Knowledge Base Expert System shell dvs GUI C+ API Run Controller Java API
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particular host in a system
functionality of a TDAQ component
number of tests can be associated
FAILED, UNRESOLVED, TIMEOUT
sequences, executed synchronously or asynchronously
are fully described in a database
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Tests levels and masks for more precise test
Asynchronous and synchronous mode for execution
Test scope to prevent conflicting tests from being
Tests verbosity can be defined globally at runtime Test’s runtime output for long-running tests Test report combined and saved in a file (and then
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allow users execute more complex test scenarios,
use already existing console utilities
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Developed tests for Tile
all ROD components
and Busy components
the 4 OC FPGAs
the 4 PUs (Dummy or DSP)
FPGA
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http://atlas.web.cern.ch/Atlas/SUB_DETECTORS/TILE/Commissioning/mobidaq/HowTo.htm
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