Presented at PIXEL2018 10-14 December 2018 Academia Sinica Pixel array for Taipei 3-D integration with an intra-cortical electrode array. B.Dierickx 1 , P.Gao 1 , A.Babaiefishani 1 , S.Veijalainen 1 , W.Wang 1 , B.Luyssaert 1 , A.Khan 2 , R.Edgington 2 , K.Sahasrabuddhe 2 , M.Angle 2 1 Caeleste, Mechelen, Belgium 2 Paradromics, San Jose, US
Outline 1. Introduction, purpose Direct extracellular neuron signal sensing Our approach Brain 2. Pixel design & performance Sense amplifier design Micro wire bundle Measured performance ROIC 256x256 pixels 3. Future outlook PCB In-pixel analog domain filtering ADC Data acquisition Prototype results 2
1. Introduction: purpose Detecting neural events in the brain → by an array of microelectrodes connected to an array of voltage amplifiers → like a large channel count oscilloscope with 10µV 20kHz resolution 3
Microwire Electrodes One microwire electrode can record spiking activity from several neurons. 4
Recording from microwire electrodes Connecting microwires directly to a CMOS array allows for readout, digitization, and multiplexing. CMOS with Metal Contact Pads Polished bundle 5
Press the bundles onto CMOS sensor Microwire bundle Bundle before Pressing Exposed wire core 100 mm 100 mm CMOS Sensor Flexible diaphragm w/ metal bond pads Bundle after Pressing (for alignment) 6
Henry/Argo sensor array Parameters Specifications # of neural sensors 65,536 (256x256) Full frame readout up to 39,000 Each pixel contains a high-gain, AC- frames/s coupled, low-noise voltage amplifier on 32 analog outputs Input referred < 10 µV rms noise (100 Hz- 20 kHz) 100 – 800 V/V Voltage gain > 1 T Ω Input impedance Pixel pitch 50 mm 7
Henry Top electrode to be hybridized to the microwire electrode 16 differential output buffers Column ampl, X-scanner 50µm 14.3mm Y scanner Pixel biasing Pixel array 15.8mm Column ampl, X-scanner 16 differential output buffers 8
2. Pixel design & performance → overall pixel topology → design for compactness & for low noise → sense amplifier → pixel layout → measured performance in the array 9
Class-A amplifier with resistive self-biasing Optimized for 1/f noise: single PMOSFET input >1M Ω 2…4pF ~1pF output Rfeedback >1T Ω 1MegOhm 10
Compact high value resistor 𝑆 = 1 𝑙𝑈 = 𝑛 𝑟. 𝐽 𝐶𝐽𝐵𝑇 PRO • Compact: a diode-connected MOSFET + a = MOSFET bias current source • R=1/g m AC value hardly dependent on variability of the 1st MOSFET. Dependent on I BIAS the variability of the bias • Can make extremely high R e.g. 1T Ω for I BIAS =25fA. Needed to make very low RC time: 1T Ω *100fC=0.1s CON • Needs an exclusive DC path for the I BIAS • Only AC / small signal: << 100mV • Not very linear • Offset must be solved by AC coupling • 1/f noise 11
Actual Class-A amplifier self-biasing with MOSFETs R>1T Ω input output - Gain = 10 - Rload = 1Mohm - LNA+LPF input referred noise reaches 10µV RMS 12
Actual Henry pixel topology 3 X 1-st order Gm-C LPF Self biased class-A amplifiers Electrode Columnwire C1 C2 LPF A2 A1 Row select C3 V DD 3 X to column load/buffer I b2 Self biasing G m M2 M3 V CC C In M1 Out I b1 R load 13
Henry pixel LNA1 LNA2 14
Total pixel gain and BW 15
PSD + input noise histogram 20𝑙𝐼𝑨 න 100𝐼𝑨 Frequency [Hz] 16
Henry pixel noise input referred noise of one row of pixels 17
3. Future outlook → recognize pulse shapes by matched filters → design of programmable filters → measured performance of prototypes 18
Data reduction == recognize these shapes Matched filter gain&phase Matched filter frequency “matched filters” Matched filter Approximated by a linear sum of 2nd order filters time time time time 19
Pixel topology Lowpass Bandpass Principal component 1 Resonant Electrode --------------------------- Pixel outputs ------------------- Q, f, A comparator + Σ in tissue + time stamp - Lowpass weights reference Bandpass - Resonant Q, f, A Principal component 2 + Σ + Lowpass Sense Bandpass - S&H Resonant weights amplifier - Q, f, A 100x Principal component 3 S&H Lowpass + Bandpass Σ Resonant + Q, f, A - weights S&H - Lowpass Bandpass Resonant Q, f, A 20
Programmable filters Filters • (resonant) bandpass filter • (resonant) lowpass filter • summator Based on “ideal” R+C active filters Actually I BIAS /g m + C implementations Continuous programmability of center/lowpass frequency, Q and gain, by programming I BIAS Patent WO 2018/191725 pending 21
The OTA • All transistors are minimum sized, or larger for mismatch • Tail current can be adjusted between <1fA and >1µA • Gain = between 100x and 200x 22
Resonant bandpass filter (ideal) Bandwidth = β Quality factor = ω 0 /β 23
Actual implementation Pro: compact layout Pro: easy to implement, pure MOS Pro: input offset free Pro: programmable by current Con: one less degree of freedom (R2 absent): If Q must be large, the difference between the two currents becomes 10µm huge. If Q is too small, the center gain H0 becomes small as well. 24
Sweeping both branch currents (simulation) The two branch currents are adjusted to obtain the desired Q and resonant frequency C=100fF 25
BPF measurement vs simulation 25 Gain [dB] Monte Carlo vs measurement 23 19 Monte Carlo 21 17 Measurement 19 Peak gain [dB] 15 17 13 Pex Chip1 15 11 Chip2 Chip3 13 9 Chip4 Frequency [Hz] 11 7 400 800 1600 Frequency [Hz] 400 500 600 700 800 900 1000 26
2 nd order low-pass filter 5µm 27
LPF measurement vs simulation 8 Gain [dB] 6 4 LPF: Monte Carlo vs Measurement 2 2.6 2.5 0 2.4 -2 2.3 Peak gain 2.2 -4 2.1 2 -6 1.9 -8 1.8 1.7 Frequency [Hz] -10 Peak frequency [Hz] 1.6 200 400 800 1600 600 700 800 900 1000 Simulation Chip1 Chip2 Chip3 Chip4 Monte Carlo Measurement 28
Multi-input differential summator N1 N2 N3 - + P1 P2 P3 Pure MOSFET design All transistors have minimum size (except when needed for matching) Capacitors are 100fF MOS Input stages are PMOSFET source followers By adjusting the currents one can set the SF’s output impedance, hence the gain of each branch 29
Summator layout 4 + inputs 4 - inputs 30
4 2 Summator: 0 simulation vs. -2 measurement Gain [dB] -4 Three different branches with different -6 gains 0dB, -4.5dB, -9dB -8 Measurement compared with simulation -10 Frequency -12 100 1000 10000 Meas_0dB Meas_-4.5dB Meas_-9dB Sim_0dB Sim_-4.5dB Sim_-9dB 31
4 Conclusions 32
Conclusions • Unprecedented massive parallel 256x256, 50µm pitch neural probe ROIC • 10µV RMS @ 20kHz bandwidth • Compact, in-pixel analog domain filters demonstrated • Fully programmable • Key design issue: mismatch of MOSFETs causes variability of frequency, gain and Q 33
Thank you! Projects sponsored by DARPA NESD Program Contract Number: N66001-17-4005 Grant Number: 1 R43 MH110287-01 PI: Angle 34 Co-PIs: Angle and Melosh
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