1 Brainchip OCTOBER 2017 | Agenda Neuromorphic computing - - PowerPoint PPT Presentation

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1 Brainchip OCTOBER 2017 | Agenda Neuromorphic computing - - PowerPoint PPT Presentation

1 Brainchip OCTOBER 2017 | Agenda Neuromorphic computing background Akida Neuromorphic System-on-Chip (NSoC) 2 Brainchip OCTOBER 2017 | Neuromorphic Computing Background 3 Brainchip OCTOBER 2017 | A Brief History of Neuromorphic


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Agenda

Neuromorphic computing background Akida Neuromorphic System-on-Chip (NSoC)

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Neuromorphic Computing Background

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A Brief History of Neuromorphic Computing

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Semiconductor Compute Architecture Cycles

Disruption Consolidation

CPU/MPU/GPU

  • Architectural
  • Von Neumann
  • Harvard
  • Multiplicity of ISAs
  • Multiplicity of Vendors
  • Multiplicity of accelerators
  • FPU
  • GPU
  • DSP

AlexNet wins Imagenet Challenge

X86/RISC GPU FPGA 1971

Intel 4004 Introduced

Artificial Intelligence Acceleration 2012

  • Acceleration
  • Convolutions
  • Spiking
  • Architecture
  • VLIW
  • Array
  • Memory
  • Datatype
  • Floating
  • Fixed
  • Binary

1990

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The Next Major Semiconductor Disruption

Source: Tractica Deep Learning Chipsets, Q2 2018

$60B opportunity in next decade Training is important, but inference is the major market Machine learning requires dedicated acceleration

10,000 20,000 30,000 40,000 50,000 60,000 70,000 2018 2019 2020 2021 2022 2023 2024 2025

$M

AI Acceleration Chipset Forecast

Training Inference General Purpose

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Explosion of AI Acceleration

Software Simulation of ANNs

X86 CPU Convolutional Neural Networks Neuromorphic Computing

TrueNorth Test Chip

Customized Acceleration

Edge Acceleration

Re-Purposed Hardware Acceleration

Loihi Test Chip Google TPU

Cloud Acceleration

X86 CPU

+ Internal ASIC Development

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8 Memory Control unit PROCESSOR Arithmetic logic unit

input

  • utput

ACCUMULATOR

Traditional CPU Architecture Inefficient for ANNs

Optimal for sequential execution Distributed, parallel, feed-forward Traditional Compute Architecture Artificial Neural Network Architecture

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ANN Differences – Primary Compute Function

Convolutional Neural Network Spiking Neural Network

Inhibited connections Reinforced connections

Synapses Neurons Spikes

Linear Algebra Matrix Multiplication

∫ ∫

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Neural Network Comparison

Convolutional Neural Networks Spiking Neural Networks

Characteristic Result Characteristic Result Computational functions Matrix Multiplication, ReLU, Pooling, FC layers Math intensive, high power, custom acceleration blocks Threshold logic, connection reinforcement Math-light, low power, standard logic Training Backpropagation off- chip Requires large pre- labeled datasets, long and expensive training periods Feed-Forward, on or

  • ff-chip

Short training cycles, continuous learning

Math intensive cloud compute Low power edge deployments

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Previous Neuromorphic Computing Programs

Primarily research programs

Investigating neuron simulation

1,000’s of ways to emulate spiking neurons

Investigating training methods

Academia or government programs

SpiNNaker (Human Brain Project) IBM TrueNorth (DARPA) Neurogrid (Stanford) Intel Loihi test chip

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Culmination of Decades of Development

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World’s first Neuromorphic System on Chip (NSoC)

Efficient neuron model Innovative training methodologies

Everything required for embedded/edge applications

On-chip processor Data->spike conversion

Scalable for Server/Cloud Neuromorphic computing for multiple markets

Vision systems Cyber security Financial tech

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Akida NSoC Architecture

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Akida Neuron Fabric

Most efficient spiking neural network implementation

1.2M Neurons 10B Synapses

Able to replicate most CNN functionality

Convolution Pooling Fully connected

Right-Sized for embedded applications 10 classifiers (CIFAR 10)

11 Layers 517K Neurons 616M Synapses

Meets demanding performance criteria

1,100 fps CIFAR-10 82% accuracy

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Neuron and Synapse Counts in the Animal Kingdom

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The Most Efficient Neuromorphic Computing Fabric

Relative Implementation Efficiency (Neurons and Synapses)

300X 3X

Fixed neuron model

Right-sized Synapses minimized

  • n-chip RAM

6MB compared to 30-50MB

Programmable training and firing thresholds

Flexible neural processor cores

Highly optimized to perform convolutions Also fully connected, pooling

Efficient connectivity

Global spike bus connects all neural processors Multi-chip expandable to 1.2 Billion neurons

Keys to efficiency

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Neuromorphic Computing Benefits

Frames per Second/watt Top-1 Accuracy

GoogLeNet Intel Myriad 2

4.2 fps/w 69% ~$10

Cifar-10 Intel Myriad 2

79% 18 fps/w ~$10

Cifar-10 BrainChip Akida

1.4K fps/w 82% ~$10

Cifar-10 IBM TrueNorth

83% 6K fps/w ~$1,000

Cifar-10 Xilinx ZC709

80% 6K fps/w ~$1,000

GoogLeNet Tegra TX2

69% 15 fps/w ~$300

Tremendous throughput with low power

Math-lite, no MACs

No DRAM access for weights Comparable accuracy

Optimized synapses and neurons ensures precision

Note: For comparison purposes only. Data and pricing are estimated and subject to change

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Akida NSoC Applications

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Vision Applications: Object Classification

Lidar Pixel DVS Ultrasound Data Interfaces Neuron Fabric

Metadata Metadata Metadata Metadata

Sensor Interfaces Conversion Complex

01010110 01010110 01010110

SNN Model Object Classification

Data Interfaces

Complete embedded solution Flexible for multiple data types <1 Watt On-chip training available for continuous learning

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Financial Technology Applications: Fintech Data Analysis

Fintech Data Neuron Fabric

Metadata Metadata Metadata Metadata

Conversion Complex

01010110 01010110 01010110

SNN Model Pattern Recognition

Data Interfaces

Unsupervised learning on chip to detect repeating patterns (Clustering) These trading patterns and clusters can then be analyzed for effectiveness

CPU

01010110

Fintech data – distinguishing parameters for stock characteristics and trading information, can be converted to spikes in SW on CPU or by Akida NSoC

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Cybersecurity Applications: Malware Detection

File or packet properties Neuron Fabric

Metadata Metadata Metadata Metadata

Conversion Complex

01010110 01010110 01010110

SNN Model File Classification

Data Interfaces

Supervised learning for file classification based on file properties

CPU

01010110

File or packet properties – distinguishing parameters for files/network traffic, can be converted to spikes in SW on CPU or by Akida NSoC

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Cybersecurity Applications: Anomaly Detection

Behavior Properties Neuron Fabric

Metadata Metadata Metadata Metadata

Conversion Complex

01010110 01010110 01010110

SNN Model Behavior classifiers

Data Interfaces

Supervised learning

  • n known good

behavior and anomalous behavior

CPU

01010110

Behavior properties can be CPU loads for common applications, network packets, power consumption, fan speed, etc..

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Creating SNNs: The Akida Development Environment

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AKIDA Training Methods

Unsupervised learning from unlabeled data

Detection of unknown patterns in data On-chip or off-chip

Unsupervised learning with label classification

First layers learns unlabeled features, labeled in fully connected layer On-chip or off-chip

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World’s first NSoC

Low power and footprint of neuromorphic computing Highest performance /w/$ Estimated tape-out 1H2019, samples 2H2019

Complete solution for embedded/edge applications – but scalable for cloud/server usage